1. Field of the Invention
This invention relates to the field of memory circuitry. More particularly, this invention relates to memory circuitry using write boost techniques to increase the voltage difference applied to a memory cell when writing a data value to that memory cell.
2. Description of the Prior Art
It is known to provide memory circuits with a write boost mechanism, such as one utilising capacitive coupling, which serves to increase the voltage difference applied to a memory cell when writing a data value to that memory cell. This increases the reliability of writes to memory cells and accordingly has an advantageous effect upon the yield of memories manufactured.
It is known to provide memories with multiple access ports. Such memories may, for example, provide two access ports with each of these access ports being able to support a read or a write operation independently of the activity upon the other access port. A problem arises when accesses to the same memory location within the memory circuitry overlap in time (at least partially). Two memory accesses which both seek to write to the same memory location and which overlap in time can be identified and suppressed. Overlapping reads to the same memory location do not present a difficulty. However, when a read operation and a write operation overlap in time, then the memory may be configured such that the write operation takes precedence and will cause the read operation to fault or abort. This faulting or aborting of the read operation does not cause too great a difficulty since the read operation may be repeated. In contrast, if a write operation fails, then the data being written may be lost and it may not be possible to recover from the failure.
In order to increase the reliability of multiple port memories it has been proposed in U.S. Pat. No. 7,606,108 that a write assist mechanism may be provided. With this mechanism, when a write is being performed using one of the access ports to a memory, then the same write signal is supplied to the other bit line pairs of the other access ports so as to increase the drive of the voltage difference being applied to the memory cell to write the new data value into the memory cell. This increases the likelihood that the new data value will be successfully written into the memory cell and accordingly increases the reliability of the memory.